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Simulated Annealing for VLSI Design by D.F. Wong
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Simulated Annealing for VLSI Design

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Description

This monograph represents a summary of our work in the last two years in applying the method of simulated annealing to the solution of problems that arise in the physical design of VLSI circuits. Our study is experimental in nature, in that we are con­ cerned with issues such as solution representations, neighborhood structures, cost functions, approximation schemes, and so on, in order to obtain good design results in a reasonable amount of com­ putation time. We hope that our experiences with the techniques we employed, some of which indeed bear certain similarities for different problems, could be useful as hints and guides for other researchers in applying the method to the solution of other prob­ lems. Work reported in this monograph was partially supported by the National Science Foundation under grant MIP 87-03273, by the Semiconductor Research Corporation under contract 87-DP- 109, by a grant from the General Electric Company, and by a grant from the Sandia Laboratories.
Release date Australia
October 5th, 2011
Audience
  • Professional & Vocational
Edition
Softcover reprint of the original 1st ed. 1988
Illustrations
XII, 202 p.
Pages
202
Dimensions
155x235x12
ISBN-13
9781461289470
Product ID
21760436

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