Source-Synchronous Networks-On-Chip

Name: Source-Synchronous Networks-On-Chip
SKU: 25732505
Price: 268.99 AUD
Availability: InStock

Circuit and Architectural Interconnect Modeling

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Paperback / softback

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Description

This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.

Release date Australia

August 23rd, 2016

Author

Audience

Professional & Vocational

Edition

Softcover reprint of the original 1st ed. 2014

Illustrations

10 Illustrations, color; 85 Illustrations, black and white; XIII, 143 p. 95 illus., 10 illus. in color.

Pages

143

Dimensions

155x235x9

ISBN-13

9781493948178

Product ID

25732505

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