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The large scale integration and planar scaling of individual system chips is reaching an expensive limit. If individual chips now, and later terrabyte memory blocks, memory macros, and processing cores, can be tightly linked in optimally designed and processed small footprint vertical stacks, then performance can be increased, power reduced and cost contained. This book reviews for the electronics industry engineer, professional and student the critical areas of development for 3D vertical memory chips including: gate-all-around and junction-less nanowire memories, stacked thin film and double gate memories, terrabit vertical channel and vertical gate stacked NAND flash, large scale stacking of Resistance RAM cross-point arrays, and 2.5D/3D stacking of memory and processor chips with through-silicon-via connections now and remote links later.
Key features:Presents a review of the status and trends in 3-dimensional vertical memory chip technologies.
Extensively reviews advanced vertical memory chip technology and development
Explores technology process routes and 3D chip integration in a single reference
Author Biography
Dr Betty Prince has over 30 years experience inthe semiconductor industry having worked with Texas Instruments,N.V. Philips, Motorola, R.C.A., and Fairchild and is currently CEOof Memory Strategies International. She has authored four books andserved from 1991-1994 on the Technical Advisory Board of IEEESpectrum magazine. She is a Senior Life Member of the IEEE andserved as an IEEE SSCS Distinguished Lecturer and on the ProgramCommittee of the IEEE Custom Integrated Circuit conference. She wasfounder of the JEDEC JC-16 Interface Standards Committee and wasactive for many years on the JC-42 Memory Committee where she wasco-chair of the SRAM standards group. She has been U.S.representative to the IEC SC47A WG3 Memory Standards Committee. DrPrince has served on the Technical Advisory Board of several memorycompanies and has been on the Board of Directors of MosaidTechnologies. She holds patents in the memory, processor andinterface areas and has degrees in Physics, Math, and Finance withdoctoral dissertation in fractal modeling.
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